Unfortunately the Atmega IC used has a 20MHz maximum clock frequency, which is a reason we did not use 27MHz in the first place. I have not tested overclocking – could be possible. I’d say the divided VCXO is a better solution if the goal is to maintain the current MCU/code. And if you are going to change the MCU, might be good to change to the iCE40 parts used in the VU007B and ESG3, so that HD sync modes and format detection are possible. I’m happy to discuss open sourcing whatever pieces to that puzzle are needed. But that is probably a different project. Keeping the thru-hole NTSC/PAL sync gen of C1 alive is also a great idea.
There’s another issue you could address with this update –
When free running, the VCXO input voltage should change to 2.5V to set the coasting frequency near the crystal’s median. Right now it falls to 0V, which makes it difficult to use as a genlock reference for other devices, and makes it fall out of range of capture devices like BMD Analog-to-SDI converter.
Easy hack for this is just a switch to select “free” vs “external” modes (4046 filter output vs 2.5V reference voltage going to the VCXO.)
You could possibly even add this on your little adapter chicklet board! I love this because it means existing C1 owners could resolve the coasting frequency issue with a VCXO chicklet update.
Additional note: I haven’t looked into requirements, but if the digital rail can be changed to 3.3V instead of 5V, this does open up the number of supply chain options. 5V VCXOs are more difficult to find these days.
I need to do more tests with the 27MHz VCXO and divide by two flip-flop configuration, though there is a few issues that needs to be look into:
the VCXO is specified for 3.3V power supply, it seems to withstand 5V and work as expected, however the nominal frequency still requires 3.3V/2 at the VC pin even with 5V supply. Having the pull-up/pull-down resistor modification as discussed in this thread Cadet RGB Encoder + BMD Mini Analog->SDI = :-( - #10 by syntonie does help with BM Analog to SDI picking up the signal, though it messes up a bit with the genlock. A switch as @rempesm did in the mentioned thread and @creatorlars suggested above would work better, as using the phase pulse out of the PLL as I did isn’t ideal.
The addon board is mounted using a 2x3 smd header, so it asks to solder it to the Cadet board in place of the 13.5MHz VCXO and then solder the addon board on top of it, which makes it hard to remove if there is an issue.
I was mostly thinking of a way for DIYers who already ordered some C1 boards to be able to use it with a 27MHz VCXO, however, I’m not sure if there is a real need for this addon board, and going for a redesign of the board as @reverselandfill suggested would make more sense. Here is my C1 with the two addon boards:
I guess there is a few different options as Lars summed up:
Keeping the existing MCU and code and replacing the 13.5MHz VCXO with the 27MHz one, adding the divide by two flip flop, and pull-up/pull-down resistors (either manually switched in/out or using an active switch controlled by the PLL as I did). I’ll get back to my modified C1 soon and see if I can tweak the pull-up/pull-down resistors in order to keep the right resting frequency without messing too much with the genlock. Would also ask to use a few SMD parts to keep the board at a reasonable size
Replacing the MCU/re-write the code and run it with the 27MHz clock: I guess going from an AVR to an ARM would allow to work with a clock higher than 20MHz, though it would ask to re-write the ASM code accordingly, haven’t worked much with MCU beside a few simple Arduino project, and don’t know about ASM either
Then, I’m might be wrong, but ARM chips only exist in SMD package (?)
Going for an FPGA based sync gen, with iCE40/iCE5, though once again, those only exist in SMD packages, the outer pins of the QFN package the iCE40 comes into can be soldered by hand with a thin iron tip, a good amount of flux and some patience, however the central ground pad will definitely require some hot air and solder paste.
The sync generator board I did for VU007B (LZX Show & Tell, lzxpcb-fpga12 / ESG3 review - #13 by syntonie) could be used, however it is a fairly dense board and even if I soldered the first prototype boards by hand, it is far from being DIY friendly. I could also look into providing the pre-assembled sync generator board, though might be going against the DIY spirit of reducing the assembly cost by doing it yourself.
I think C1 ingenuity is the fact that it is made of through hole components only (except for the VCXO), making it easy to DIY, so not exactly sure what would be the best course of action considering this.
I suppose it would also be possible to source the 13.5MHz VCXO by requesting it from the supplier, but that probably means ordering a 1000 or so, and not sure if there would be enough interest to justify it. Also kind of move away from the open source DIY nature of the project where DIYers can source the components themselves without relying on a third party.
Anyway, open to any suggestions and ready to help keeping C1 alive!
Another possibility is to make a tunable VCXO using a typical 2-pin crystal and a Varactor diode. We used this method in the first Visionary series Video Sync Generator. However it requires a Varactor with a strong pull range and possibly a trim capacitor. SMV1255 is a good Varactor, but pretty expensive.
Another option would be to use something like the HC4046 VCO to generate the MCU clock instead of a crystal. Possibly not as stable, but it could work.
Something like that, but the circuit was simpler. The varactor was in series with one of the crystal’s tuning caps (typically a 20pF to 0V, but in this case the varactor’s capacitor factors in). In the original video sync gen, we tried MV2105 (IIRC) first and then moved to SMV1255. I’ll see if I can dig out that schematic soon.
@syntonie Is there possibly a gerber or basic schematic you would be willing to share regarding this ingenius adaptor board work around?:)…at the end of the proverbial rope scouring the wastelands of obsolescence haha cheers!
Hey Lars! regarding the varactor diode circuit am I correct in assuming the 2 pin crystal would be a 13.5mhz? (sorry for the redundancy with the query just am stuck on the build here and want to be idiot proofing my actions ha!) I have two 13.5mhz crystals currently and am excited to hear of this solution, if that be the case! Cheers!
Yes for Cadet1, a 13.5MHz crystal is right. Post the circuit you’re working with if you have trouble with it! The basic idea is to have a typical 13.5MHz crystal oscillator circuit (might need an HC04 buffer), but replace/append the capacitor on one side with the varactor, so that the capacitance can be varied.
Basically VC, +5V and GND are coming from the connector (J1) that is soldered in place of the existing VCXO.
There is a +3.3V regulator for the 27MHz VCXO (X1) that cannot be powered by +5V (from what I tested, it can, though better safe than sorry ). One issue that I already mentioned above, is that the resting frequency of the VCXO is at Vcc/2 (so 1.65V), whereas the output of the PLL filter will be more about 2.5V (since it is powered by 5V), which is an issue for genlock.
The 27MHz output is going into a D-flip flop (U1) wired as a divide by 2, to get 13.5MHz. I’ve added an inverter (U2) at the output of the flip flop, as I couldn’t find a flip-flop with Q output in SOT23 format, only /Q, however I’m not sure if it is really needed.
About the gerbers, I’d prefer to test it a bit more before releasing it. Also, I think now that the varactor solution might be a simpler way to do it, may require some trimming of the VC going to the varactor cathode though but would solve the issue with the 27MHz VCXO needing to be powered by +3.3V.