Cadet Sync Generator 13.5MHZ CMOS SMD

Hey community,
Im about to building the cadet sync generator. The BOM says there is a OSC VCXO 13.5MHZ CMOS SMD needed, with the suggestion to get it from digikey (art. nr. 300-8162-1-ND). Im Ordering everything from mouser, but because of my lack of knowledge in electronics, its hard to me to find a substitute that will work. Someone found a substitute for this part on mouser?
cheers!

did you buy the pcb? if so, it is already soldered on

no i did not, thought to order first the parts and then get the pcb+panel at the store in the city… ah yes really? thats awesome!!

The Cadet I panel + pcb also includes the microcontroller with the firmware already flashed, but you do have to solder that (just a DIP though). The Cadet II also has the SOIC16 encoder chip (AD724JRZ) already soldered.

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thank you very much!!

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That part (300-8162-1-ND) is a crystal oscillator, by the way.

Reviving this thread because it seems hard to find a suitable replacement for the CSX-750 oscillator (discontinued). Most similar oscillators do not have a “VC” input or are not 5V tolerant.

Questions:

  1. How accurate does the frequency have to be? E.g. there are many oscillators available for 13.48Mhz … 13.56Mhz and similar. What is the reason a 13.5Mhz osc has been selected (especially since I don’t recognize this frequency as any of the common NTSC/PAL etc. ones)?

  2. Does anyone have an idea for a suitable replacement? Package does not matter much but it should run on 5V.

  3. Thinking to emulate the osc using a LTC1799 type programmable clock (and a trimmer to set the frequency). Would this work with the 74HC4046 PLL or would I have to redesign the circuit for the clock decelerate/accelerate feature to work?

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I’ve heard this business has them: (not confirmed yet)

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Frequency needs to be as accurate as possible, it is maybe less of an issue if the receiving device is a CRT for example, as it will be more tolerant to frequency deviations (like with some retro video game consoles), though a capture card or any device involving an analog to digital conversion may have trouble locking to it/decode the video.

Concerning the choice of 13.5MHz as a clock, it is so it can be divided nicely into horizontal sync frequencies using integers (for PAL 13.5MHz/864 = 15.625kHz, and for NTSC, 13.5MHz/858 = 15.73425kHz). Then, since interlaced SD video also requires to generate twice the horizontal sync frequencies during vertical blanking interval for equalization/serration pulses, it asks to divide the 13.5MHz clock frequency by 429 in NTSC. So using, let’s say, half the clock frequency (7.25MHz), it would ask to divide by 214.5, which starts to get tricky in the digital domain when phase/frequency accuracy is crucial.

I’m using a 27MHz VCXO on my own sync gen which is more easily available, though in the case of the Cadet I, it would ask to change/rewrite the code in the Atmega which is meant to work with 13.5MHz. Then maybe using a flip-flop to divide the 27MHz by 2 could work, though since it is in a feedback loop between the PLL and Atmega, it might be an issue.

Since LTC1799 frequency is set by a resistor, it would ask to be able to change the resistor value based on the phase comparator output of the PLL (to do the increase/decrease in frequency for the sync generator to lock to the external signal). Maybe a JFET as a VC resistor could work, though it will probably ask for really precise tuning.

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