Fortress is a low rez hi fi video graphics instrument with no CPU, based on analog clock oscillators and high speed comparators. Generate patterns and animation with 3-bit numbers using the techniques of early digital video art pioneers. Digitize and recolorize video sources in real time with internal palette memory. The perfect video synthesis voice module for recreating the cover art of 1970s textbooks and early arcade graphics.
- Horizontal, vertical and low frequency analog clock VCOs with dedicated 3-bit counting DACs and selectable waveform patterns.
- Three realtime ADCs for 8-level slicing of analog video inputs, based on high speed analog comparators. An intricate Slip Sync mode can chain all three oscillators to create phase scrolling motion for animation.
- 4 Bit ALU (Arithmetic Logic Unit) with 8 selectable operations including Add, Subtract, AND, OR, XOR, NAND, NOR and XNOR.,
- 16 Stage Shift Register Delay Line with 8 selectable output taps.
- 32 Bit Cellular Automata generative drawing algorithm with 8 selectable rulesets.
- 48 Bit Linear Feedback Shift Register for pseudorandom patterned noise with 8 selectable XOR taps.
- 9-bit RGB DACs with palette memory and 8 selectable color palettes.
- Width, 22HP
- Mounting Depth, 42mm
- Power +12V @ 180mA
- Power -12V @ 110mA
Fortress is an encapsulation of the design concepts first presented in the LZX Castle DIY module series. It is also the successor to the LZX BitVision video synthesizer, the LZX Visionary logic series modules, and several unreleased prototypes throughout the years. It was conceptualized and designed by Phil Baljeu, Jonah Lange and Lars Larsen.
Historic design references include video synthesizers such as the EMS Spectre, Stephen Beck’s Video Weaver, realtime logic based arcade games such as Pong and Centipede, and the primitive colorizers found in consumer video cameras throughout the 1980s.
Palette Selection Reference
Program Selection Reference
000 – ARITHMETIC/LOGIC COMPOSITOR – ADC1 is combined with ADC2 according to an operation selected by ADC3: ADD, SUBTRACT, AND, OR, XOR, NAND, NOR, XNOR. The output of the ALU is 3 bits wide and goes directly to the DAC output. The ALU output also selects a 9-bit RGB value from the selected palette.
100 – 16X3-BIT RGB SHIFT REGISTER – ADC2 selects a shift register delay length. The ALU combines the latched and delayed versions of the ADC1 input.
010 – 32-BIT CELLULAR AUTOMATA – ADC2 selects a cellular automata ruleset. The cellular automata pattern is drawn by clocks created by OSC1 and OSC2. The ALU combines the cellular automata pattern with ADC1.
110 – 48-BIT LINEAR FEEDBACK SHIFT REGISTER – ADC2 selects a pseudorandom seed value. The LFSR pattern is drawn by clocks created by OSC1 and OSC2. The ALU combines the LFSR pattern with ADC1.
xx1 – OSCILLATOR SLIP SYNC ON – The last four program select modes are identical to the first four, but with the addition of motion generation through a special chained slip sync mode using OSC1, OSC2, and OSC3. In this mode, the 2-bit mode switches for OSC2 and OSC3 will select phase modulation directions and OSC2 phase swapping options.