LZX Timeline Module

I like this idea.

Also, I have no clue what the circuitry required here is like, but this sounds to me like it could at least conceptually fit within the Castle range.

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I’d have to review the castle modules, but a latch is also a “D flip flop” and I think that function is present.

Here’s how it’s implemented on gen3 modules with a 74HC175 quad latch IC. (Note all input/output voltages are 5V and you’d need to have comparators on all inputs going to a 3.5mm jack of course – this is just the heart of the circuit.) You can just feed VSYNC or whatever latch clock you want to the CLOCK input.

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Exceptionally helpful post. Thank you!

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